| Logic Shift Memory Right | ||||
|---|---|---|---|---|
| Memonic | Mode | Opcode | Cycles | Bytes |
| LSR | Indexed | 64 | 7 | 2 |
| Extended | 74 | 6 | 3 | |
Results:
H not affected
N set if bit 7 is 1
Z set if all bits are 0
V set to N * C after shift has occured
C set on carry from bit 7
| m6800/m6802 instruction set logic shift right memory | What links here? |
| Logic Shift Memory Right | ||||
|---|---|---|---|---|
| Memonic | Mode | Opcode | Cycles | Bytes |
| LSR | Indexed | 64 | 7 | 2 |
| Extended | 74 | 6 | 3 | |
| filename: | microprocessors - MC6800/MC6802 - instruction set - logic shift right memory |
| filename: | microprocessors%20%2D%20MC6800%2FMC6802%20%2D%20instruction%20set%20%2D%20logic%20shift%20right%20memory |
| last edit: | February 06 2010 11:22:46 (5215 days ago) |
| ct | = 1716103975.000000 = May 19 2024 03:32:55 |
| ft | = 1265473366.000000 = February 06 2010 11:22:46 |
| dt | = 450630609.000000 |