| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-0 | R/W-x |
| GIE | EEIE | T0IE | INTE | RBIE | T0IF | INTF | RBIF |
| Bit | Kind | Name | Description |
|---|---|---|---|
| bit 7 | R/W-0 | GIE | Global Interrupt Enable bit 0 = disables all interupts 1 = enables all unmasked interrupts |
| bit 6 | RW-1 | EEIE | EE Write Complete Interrupt Enable bit 0 = disabled 1 = enabled |
| bit 5 | R/W-0 | T0IE | TMR0 Overflow Interrupt Enable bit 0 = disabled 1 = enabled |
| bit 4 | R/W-0 | INTE | RB0/INT External Interrupt Enable bit 0 = disabled 1 = enabled |
| bit 3 | R/W-0 | RBIE | RB Port Change Interrupt Enable bit 0 = disabled 1 = enabled |
| bit 2 | R/W-0 | T0IF | The TMR0 register has overflowed. Must be cleared in software |
| bit 1 | R/W-0 | INTF | The RB0/INT external interrupt has occured. Must be cleared in software |
| bit 0 | R/W-x | RBIF | One of the pins RB4 through RB7 have changes state. Must be cleared in software |