| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| U-0 | U-0 | R/W-x | R/W-x | R-x | R/W-x | R/W-x | R/W-x |
| RA5 | RA4 | RA3 | RA2 | RA1 | RA0 |
| Bit | Kind | Name | Description |
|---|---|---|---|
| bit 7 | U-0 | Unimplemented bit | |
| bit 6 | U-0 | Unimplemented bit | |
| bit 5 | R/W-X | RA5 | General Purpose I/O bit 1 = pin is > Vih. 0 = pin is < Vil. |
| bit 4 | R/W-X | RA4 | |
| bit 3 | R-X | RA3 | |
| bit 2 | R/W-X | RA2 | |
| bit 1 | R/W-X | RA1 | |
| bit 0 | R/W-X | RA0 |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| U-0 | U-0 | R/W-1 | R/W-1 | R-1 | R/W-1 | R/W-1 | R/W-1 |
| TRISA5 | TRISA4 | TRISA3 | TRISA2 | TRISA1 | TRISA0 |
| Bit | Kind | Name | Description |
|---|---|---|---|
| bit 7 | U-0 | Unimplemented bit | |
| bit 6 | U-0 | Unimplemented bit | |
| bit 5 | R/W-1 | TRISA5 | 1 = pin is configured as an input. 0 = pin is configured as an output. |
| bit 4 | R/W-1 | TRISA4 | |
| bit 3 | R-1 | TRISA3 | |
| bit 2 | R/W-1 | TRISA2 | |
| bit 1 | R/W-1 | TRISA1 | |
| bit 0 | R/W-1 | TRISA0 |
BCF STATUS,RP0 ;Bank 0
BCF STATUS,RP1 ;
CLRF PORTA ;Init PORTA
BSF STATUS,RP1 ;Bank 2
CLRF ANSEL ;digital I/O
BSF STATUS,RP0 ;Bank 1
BCF STATUS,RP1 ;
MOVLW b'00001100' ;Set RA3 and RA2 as inputs
MOVWF TRISA ;and RA5, RA4, RA1, and RA0 as outputs
BCF STATUS,RP0 ;Bank 0